Digital security by design challenge

Integrated computer chip on circuit board

This challenge is investing in projects that help the UK digital computing infrastructure to become more secure.

Cybersecurity is a major UK government strategic priority. The World Economic Forum Risks Report 2018 lists data fraud or theft and cyber-attacks as a key global risk.

The challenge has up to £70 million to invest in technology platforms and support for software development and business-led demonstrators. The funding is matched by £117 million from industry.

The scope of this challenge includes implementing updated hardware architecture, developing the software and system development tools that will run on it, and demonstration in at least two industry sectors.

The challenge covers three areas of activity:

  • technology platform prototype
  • collaborative research and development (software development, enabling use)
  • up to four business-led demonstrators.

Find funding opportunities

You can use our funding finder to search for ISCF funding and any wider opportunities related to cybersecurity.

You can also keep up to date with latest challenge updates and developments on:

Funded and announced projects

Technology platform prototype

The programme has funded software design company Arm to develop a technology platform prototype which is more resistant to cyber-threats – making it harder to attack technology infrastructure and remotely take control.

The project also involves open-source software specialists Linaro and the universities of Cambridge and Edinburgh.

Read more about Arm’s technology platform prototype.

Discribe – Digital Security by Design Social Science Hub+

A social science-led research programme bringing together social scientists, economists, computer scientists, and arts and humanities professionals for research, networking and engagement with the wider community.

Read more about the Discribe project.


Developing a formal, executable specification that every component of a mission-critical system-on-chip has to follow.


Focusing on capability architectures and trusted execution to protect safety and security-critical systems.

Read more about the CAP-TEE project.


Investigating how capability protection can be applied to systems containing heterogeneous accelerators for applications such as graphics, AI, cryptography and networking.


Developing capability-based cloud compartments that can express policies about the confidentiality and integrity of data, within and across components of a cloud stack and cloud native applications.


Developing new hypervisor and operating-system software compartmentalisation models able to use the CHERI / Morello architectural primitives to improve compartmentalisation scalability.


Improving the security of high-performance programming language VMs using CHERI hardware enforced capabilities.


Developing a new semantic definition of C that provides safety by default, enabling it to be compatible with the DSBD hardware and maximising security.


Developing a new software verification toolchain for capabilities to verify the Morello platform is used correctly, based on state-of-the-art static and dynamic software verification and theorem-proving techniques.

Read more about the SCorCH project.


Exploring engineering challenges in establishing and formally verifying the relationship between application-level security requirements and secure software implementations running on capability hardware.

Read more about the HD-Sec project.

Last updated: 27 June 2022

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